`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date:    10:33:59 11/22/2010 
// Design Name: 
// Module Name:    vga_stripes 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module vga_stripes(vidon, hc, vc, red, green, blue);

input wire vidon;
input wire [9:0] hc, vc;
output reg [2:0] red, green;
output reg [1:0] blue;

always @ (*)
	begin
		red = 0;
		green = 0;
		blue = 0;
		if (vidon == 1)
			begin
				red = {vc[2],vc[2],vc[2]};
				green = ~red;
				blue = {hc[2],hc[2]};
			end
	end
	
endmodule
